1. Field of the Invention
The present invention relates to the generation of trace data within a data processing apparatus.
2. Description of the Prior Art
There is a requirement for data processing systems having improved performance and functionality, which typically means an increase in the complexity of the systems. Furthermore, there is a requirement to reduce the development and testing time for these more complex data processing systems, which means that there is an increasing need for powerful yet easy-to-use diagnostic mechanisms for identifying problems associated with data processing systems and to improve the performance of those data processing systems by adjusting their design and configuration.
There is a general move towards more deeply-embedded processor cores, which makes it more difficult to track the architectural state of the processor (such as the contents of registers, values stored at particular memory locations or status of the buses, paths, lines, flags or modules within the processing system) via externally accessible pins. Accordingly, as well as off-chip tracing mechanisms for capturing and analysing trace data, increased amounts of tracing functionality are being placed on-chip. Examples of such on-chip tracing mechanisms are the Embedded Trace-Macrocell (ETM) provided by ARM Limited, Cambridge, England in association with their various ARM processors.
Such tracing mechanisms could use a real-time stream of trace data representing the activities of the data processing system that are desired to be traced. This stream of trace data can subsequently be used to facilitate debugging of sequences of processing instructions included in software code being executed by the data processing apparatus.
Another trend within data processing systems is the increasing use of multi-processor systems. These are used to deliver higher performance by permitting and processing to be performed in parallel by the plurality of processors. However, tracing circuitry such as ETMs are expensive in terms of silicone area so that it becomes inefficient to supply such multi processor systems with separate sets of tracing circuitry corresponding to each of the plurality of processors of the system.
It is known to share one ETM between a plurality of processing cores using static switching whereby, in advance of the diagnostic processing being performed, a debug tool selects which of the plurality of processors is to be traced and configures the trace subsystem to trace a particular one of the plurality of processors. For example, the processor to be traced by the single ETM may be set via a register entry during a programming phase (rather than an operational phase) of the data processing system. However, such static switching is inflexible since it does not allow a given processing task to be fully traced if the task under observation moves from processor to processor. Thus, in known systems, the only way of reliably fully tracing a process that switches from processor to processor is to trace all of the processors substantially simultaneously. This requires a set of tracing circuitry for each of the plurality of processors. However, even in multi-processor systems having multiple ETMs, trace bandwidth constraints are likely to mean that it is still not possible to enable tracing on a plurality of ETMs substantially simultaneously.
Accordingly there is a need for a more flexible and more efficient tracing mechanism for performing trace in a multiple processor system.